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BCA 1 SEM Digital Logic SEP 2024

 Title of Subject: DIGITAL LOGIC & COMPUTER DESIGN (Major – 2)

COURSE CODE: 24MJBCA1L2                             CIA Marks: 20

SEMESTER: I                                                             SEE Marks: 80

Contact Hours: (L:T:P): 4-0-0 Credit: 04 Duration of Exam: 03


UNIT – I:                                                                                                 10 Hours

Number system and codes: Number Systems: Binary number system, decimal number system,

octal number system, hexadecimal number system. conversion from one number system to

another. Complement representation of negative numbers: Signed Magnitude, One’s

complement method, Two’s complement method, Binary Arithmetic. Codes: BCD, GRAY,

EXCESS-3, ASCII and Unicode, error detection and error correction codes.

UNIT – II:                                                                                                         12 Hours

Boolean algebra and logic systems: Laws of Boolean algebra, Boolean laws. Evaluation of

Boolean expression, De Morgan's theorems and proof, simplification on Boolean expressions

using Boolean laws. Basic gates (AND, OR, NOT): truth table, Definition, Boolean expression

and symbols, universal gates (NAND, NOR): truth table, definition, Boolean expression and

symbols, design of basic gates using NAND and NOR gates- Logical gates using NAND and

NOR, Design of given Boolean expression using basic gates or universal gates. XOR and XNOR

gates (Definition, Boolean expression and symbols, truth table).

UNIT – III:                                                                                                           12 Hours

Simplification of Boolean functions: SOP and POS form, min term and max term, expression

of Boolean equation in Min and Max term (conversion of SOP and POS forms to standard form)

K-map method: Rules, simplification of Boolean equation using K-map (up to 4 variables),

without and with don't-care condition, Implementation using basic gates or NAND gate or

NOR gate, Quine - McCluskey Tabulation method, determination and selection of prime

implicates

UNIT – IV:                                                                                                                    10 Hours

Combination logic: Design procedure, design of half adder and full adder, half subtract or and

full sub tractor. Code converters: - BCD to Excess 3 code, gray code, magnitude comparator,

encoders (BCD to decimal), decoder (decimal to BCD), Multiplexer (4:1 and 8:1)

DeMultiplexer(1:4 and 1:8).

UNIT – V:                                                                                                                 12 Hours

Sequential logic: Introduction, Flip-flops — SR, JK, D, T, JK-MS (Detailed Study) Registers —

Introduction, shift register- types and applications. Counters — synchronous and asynchronous

counters (Up, down, up down).

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